Part Number Hot Search : 
T960012 555K11 NCP58 TLGD175 AK4964Z ZT483EEP D35SB100 4056E
Product Description
Full Text Search
 

To Download PTN3311D Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 INTEGRATED CIRCUITS
PTN3310/PTN3311 High-speed serial logic translators
Product data 2001 Jun 19
Philips Semiconductors
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
FEATURES
* Meets LVDS EIA-644 and PECL standards * 2 pin-for-pin replacement input/output choices:
- LVDS in, PECL out (PTN3310) - PECL in, LVDS out (PTN3311)
Figure 1 shows the High-Speed Serial Logic Translator Device in a typical high speed optical module application. Figure 2 shows the circuit block diagrams.
PIN CONFIGURATIONS
GND1 VINP VINN GND2 1 2 8 7 VCC1 VOUTP VOUTN VCC2
* Single +3.3 V supply voltage operation * Available in 8-pin SO package * Maximum throughput data rate of 800 Mbps typical
APPLICATIONS
- ATM - SONET/SDH - Switches - Routers - Add-drop multiplexers
PTN3310
3 4 6 5
* High-speed networking and telecom applications
GND1 VINP VINN GND2
1 2
8 7
VCC1 VOUTP VOUTN VCC2
PTN3311
3 4 6 5
8-pin SO package
GENERAL DESCRIPTION
The High-Speed Serial Logic Translator provides a point solution that addresses the various interface logic requirements of Optical Transceiver Modules. The product offers a compact translation between LVDS and PECL high speed serial data lines. This provides the end users a simple way to mix or match Optical Transceiver ICs from various vendors to maximize desired performance and reduces the need to redesign interfaces to accommodate new Optical Transceiver ICs. The High-Speed Serial Logic Translator comes in two translation choices to allow mixing LVDS and PECL input/outputs. The product is offered in a small, convenient, 8-pin package.
ST00014
PIN DESCRIPTIONS 8-pin SO package
Pin # 1, 4 2, 3 5, 8 6, 7 Symbol GND1, GND2 VINP, VINN VCC1, VCC2 VOUTN, VOUTP Name and function Ground Differential inputs Supply voltage Differential outputs
ORDERING INFORMATION
Type number n mber PTN3310D PTN3311D Package Name SO8 SO8 Description Plastic small-outline package; 8 leads; body width 3.9 mm Plastic small-outline package; 8 leads; body width 3.9 mm Version SOT96-1 SOT96-1
2001 Jun 19
2
853-2264 26562
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
Optical RCVR Optical Laser Driver
Translator MAC (ASIC) Translator Serial Backplane Device To/From Serial Backplane
Optical Interface IC's 1 x 9 Optical Module Figure 1. High-Speed Serial Logic Translators in Optical Module Application
ST00040
LVDS IN
PECL OUT
PTN3310
PECL IN
LVDS OUT
PTN3311
ST00009
Figure 2. High-Speed Serial Logic Translator Block Diagrams
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO tSC Tj Tstg ESDHBM ESDMM Parameter Supply voltage LVDS receiver input voltage LVDS driver output voltage LVDS output short circuit duration Maximum junction temperature Storage temperature range Electrostatic discharge (Human Body Model, 1.5 k, 100 pF) Electrostatic discharge (Machine Model, 0 k, 200 pF) Limits -0.3 to +4.0 -0.3 to +5.5 -0.3 to +5.5 continuous +150 -65 to +150 >2 >200 C C kV V Unit V V V
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Tamb VCCN Parameter Supply voltage Operating ambient temperature range in free air Power supply noise voltage Min 3.0 -40 - Max 3.6 +85 100 Unit V C mVPP
2001 Jun 19
3
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
DC ELECTRICAL CHARACTERISTICS
Symbol General VCC ICC IEE VIH VIL II VID IIN Supply voltage Power supply current Power supply current Input HIGH voltage1 Input LOW voltage1 Input current Minimum differential input signal amplitude Input current2 VIN = 0 V VIN = VCC PECL outputs (PTN3310) VOH VOL CL VOD VOD VOS VOS IOS CL Output HIGH voltage1 Output LOW voltage1 Output load capacitance Output differential voltage Steady-state difference in output differential voltage between complementary output states Offset voltage Steady-state difference in offset voltage between complementary output states Output short-circuit current Output load capacitance outputs mutually shorted output shorted to GND 2.275 1.490 - 250 - 1.125 - - - - 2.345 1.595 5 350 - 1.250 - - - 5 2.420 1.680 - 450 50 1.375 50 12 24 - V V pF mV mV V mV mA mA pF VIN = VCC or GND PTN3311 PTN3310 3.0 - - 2.135 1.490 - 100 - - 3.3 12 13 - - - - - - 3.6 20 20 2.420 1.825 10 - 20 20 V mA mA V V A mV mA mA Parameter Conditions Min Typ Max Unit
PECL inputs (PTN3311)
LVDS inputs (PTN3310)
LVDS outputs (PTN3311); RL = 100
NOTES: 1. These values are for VCC = 3.3 V; PECL level specifications are referenced to VCC and will track 1:1 with variation of VCC. 2. Power supply either on or off.
2001 Jun 19
4
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
AC ELECTRICAL CHARACTERISTICS
Symbol General fMAX tS SKEW tPLH/tPHL Maximum throughput data rate Clock output skew, part-to-part Clock output pulse skew Propagation delay input (differential) to output Propagation delay input (single-ended) to output Output rise and fall times at 20% and 80% intersects Transition time LOW to HIGH Transition time HIGH to LOW Peak-to-peak switching offset voltage RL = 100 ; CL = 5 pF RL = 100 ; CL = 5 pF Measured between two matched 49.9 load resistors; 5 pF load capacitance 655 - - - - 800 100 50 1 1 - - - 3 3 Mbps ps ps ns ns Parameter Conditions Min Typ Max Unit
PECL outputs (PTN3310) tr/tf - 200 300 ps
LVDS outputs (PTN3311); RL = 100 ; CL = 5 pF tTLH tTHL VOSS - - - 500 500 - 650 650 150 ps ps mV
LVDS REFERENCE MEASUREMENT CONFIGURATION
Voutp
PTN331x 1 5 2 6 3 7 4 8
Rload CLVDS
Cprobe
Vos
Rload
Cprobe
Voutn
Vod = Voutp - Voutn
Rload = 50 Ohms CLVDS = 5 pF
ST00041
The above diagram shows the test set-up used when evaluating LVDS outputs. According to the TIA-EIA-644 Standard, the maximum lumped capacitance test load should be 5 pF. However, by using probes or cables to observe the signal, additional capacitance is added, which has an effect on the rise and fall times. Cprobe represents any capacitance caused by the use of probes or cables. Assuming balanced loading and balanced output drivers, the total effective capacitance seen by the part is: CEff = CLVDS + 1/2 Cprobe To correctly account for the effects of Cprobe, the following formula should be used:
5 pF Dt + C Dt Eff
measured,
Where t is the 20%-80% rise/fall time. To avoid the use of additional calculation of the measured results, a different approach could be taken; however, the value of Cprobe has to be known in advance. In that case, the value of CLVDS can be chosen such that the sum of the capacitances equals 5 pF, i.e.: CLVDS + 1/2 Cprobe = 5 pF
2001 Jun 19
5
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
2001 Jun 19
6
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
Data sheet status
Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2001 All rights reserved. Printed in U.S.A. Date of release: 06-01
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Document order number:
9397 750 08511
Philips Semiconductors
2001 Jun 19 7


▲Up To Search▲   

 
Price & Availability of PTN3311D

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X